mariadb/include/my_atomic.h

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#ifndef MY_ATOMIC_INCLUDED
#define MY_ATOMIC_INCLUDED
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/* Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
Copyright (c) 2018, 2022, MariaDB
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
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the Free Software Foundation; version 2 of the License.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1335 USA */
/*
This header defines five atomic operations:
my_atomic_add#(&var, what)
my_atomic_add#_explicit(&var, what, memory_order)
Bug#22320: my_atomic-t unit test fails Bug#52261: 64 bit atomic operations do not work on Solaris i386 gcc in debug compilation One of the various problems was that the source operand to CMPXCHG8b was marked as a input/output operand, causing GCC to use the EBX register as the destination register for the CMPXCHG8b instruction. This could lead to crashes as the EBX register is also implicitly used by the instruction, causing the value to be potentially garbaged and a protection fault once the value is used to access a position in memory. Another problem was the lack of proper clobbers for the atomic operations and, also, a discrepancy between the implementations for the Compare and Set operation. The specific problems are described and fixed by Kristian Nielsen patches: Patch: 1 Fix bugs in my_atomic_cas*(val,cmp,new) that *cmp is accessed after CAS succeds. In the gcc builtin implementation, problem was that *cmp was read again after atomic CAS to check if old *val == *cmp; this fails if CAS is successful and another thread modifies *cmp in-between. In the x86-gcc implementation, problem was that *cmp was set also in the case of successful CAS; this means there is a window where it can clobber a value written by another thread after successful CAS. Patch 2: Add a GCC asm "memory" clobber to primitives that imply a memory barrier. This signifies to GCC that any potentially aliased memory must be flushed before the operation, and re-read after the operation, so that read or modification in other threads of such memory values will work as intended. In effect, it makes these primitives work as memory barriers for the compiler as well as the CPU. This is better and more correct than adding "volatile" to variables. include/atomic/gcc_builtins.h: Do not read from *cmp after the operation as it might be already gone if the operation was successful. include/atomic/nolock.h: Prefer system provided atomics over the broken x86 asm. include/atomic/x86-gcc.h: Do not mark source operands as input/output operands. Add proper memory clobbers. include/my_atomic.h: Add notes about my_atomic_add and my_atomic_cas behaviors. unittest/mysys/my_atomic-t.c: Remove work around, if it fails, there is either a problem with the atomic operations code or the specific compiler version should be black-listed.
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'Fetch and Add'
add 'what' to *var, and return the old value of *var
All memory orders are valid.
my_atomic_fas#(&var, what)
my_atomic_fas#_explicit(&var, what, memory_order)
'Fetch And Store'
store 'what' in *var, and return the old value of *var
All memory orders are valid.
my_atomic_cas#(&var, &old, new)
my_atomic_cas#_weak_explicit(&var, &old, new, succ, fail)
my_atomic_cas#_strong_explicit(&var, &old, new, succ, fail)
'Compare And Swap'
if *var is equal to *old, then store 'new' in *var, and return TRUE
otherwise store *var in *old, and return FALSE
succ - the memory synchronization ordering for the read-modify-write
operation if the comparison succeeds. All memory orders are valid.
fail - the memory synchronization ordering for the load operation if the
comparison fails. Cannot be MY_MEMORY_ORDER_RELEASE or
MY_MEMORY_ORDER_ACQ_REL and cannot specify stronger ordering than succ.
The weak form is allowed to fail spuriously, that is, act as if *var != *old
even if they are equal. When a compare-and-exchange is in a loop, the weak
version will yield better performance on some platforms. When a weak
compare-and-exchange would require a loop and a strong one would not, the
strong one is preferable.
my_atomic_load#(&var)
my_atomic_load#_explicit(&var, memory_order)
return *var
Order must be one of MY_MEMORY_ORDER_RELAXED, MY_MEMORY_ORDER_CONSUME,
MY_MEMORY_ORDER_ACQUIRE, MY_MEMORY_ORDER_SEQ_CST.
my_atomic_store#(&var, what)
my_atomic_store#_explicit(&var, what, memory_order)
store 'what' in *var
Order must be one of MY_MEMORY_ORDER_RELAXED, MY_MEMORY_ORDER_RELEASE,
MY_MEMORY_ORDER_SEQ_CST.
'#' is substituted by a size suffix - 8, 16, 32, 64, or ptr
(e.g. my_atomic_add8, my_atomic_fas32, my_atomic_casptr).
The first version orders memory accesses according to MY_MEMORY_ORDER_SEQ_CST,
the second version (with _explicit suffix) orders memory accesses according to
given memory order.
memory_order specifies how non-atomic memory accesses are to be ordered around
an atomic operation:
MY_MEMORY_ORDER_RELAXED - there are no constraints on reordering of memory
accesses around the atomic variable.
MY_MEMORY_ORDER_CONSUME - no reads in the current thread dependent on the
value currently loaded can be reordered before this
load. This ensures that writes to dependent
variables in other threads that release the same
atomic variable are visible in the current thread.
On most platforms, this affects compiler
optimization only.
MY_MEMORY_ORDER_ACQUIRE - no reads in the current thread can be reordered
before this load. This ensures that all writes in
other threads that release the same atomic variable
are visible in the current thread.
MY_MEMORY_ORDER_RELEASE - no writes in the current thread can be reordered
after this store. This ensures that all writes in
the current thread are visible in other threads that
acquire the same atomic variable.
MY_MEMORY_ORDER_ACQ_REL - no reads in the current thread can be reordered
before this load as well as no writes in the current
thread can be reordered after this store. The
operation is read-modify-write operation. It is
ensured that all writes in another threads that
release the same atomic variable are visible before
the modification and the modification is visible in
other threads that acquire the same atomic variable.
MY_MEMORY_ORDER_SEQ_CST - The operation has the same semantics as
acquire-release operation, and additionally has
sequentially-consistent operation ordering.
We choose implementation as follows: on Windows using Visual C++ the native
implementation should be preferable. When using gcc we prefer the Solaris
implementation before the gcc because of stability preference, we choose gcc
builtins if available.
*/
#if defined(_MSC_VER)
#include "atomic/generic-msvc.h"
#elif defined(HAVE_SOLARIS_ATOMIC)
#include "atomic/solaris.h"
#elif defined(HAVE_GCC_C11_ATOMICS)
#include "atomic/gcc_builtins.h"
#endif
#ifndef MY_MEMORY_ORDER_SEQ_CST
#define MY_MEMORY_ORDER_RELAXED
#define MY_MEMORY_ORDER_CONSUME
#define MY_MEMORY_ORDER_ACQUIRE
#define MY_MEMORY_ORDER_RELEASE
#define MY_MEMORY_ORDER_ACQ_REL
#define MY_MEMORY_ORDER_SEQ_CST
#define my_atomic_store32_explicit(P, D, O) my_atomic_store32((P), (D))
#define my_atomic_store64_explicit(P, D, O) my_atomic_store64((P), (D))
#define my_atomic_storeptr_explicit(P, D, O) my_atomic_storeptr((P), (D))
#define my_atomic_load32_explicit(P, O) my_atomic_load32((P))
#define my_atomic_load64_explicit(P, O) my_atomic_load64((P))
#define my_atomic_loadptr_explicit(P, O) my_atomic_loadptr((P))
#define my_atomic_fas32_explicit(P, D, O) my_atomic_fas32((P), (D))
#define my_atomic_fas64_explicit(P, D, O) my_atomic_fas64((P), (D))
#define my_atomic_fasptr_explicit(P, D, O) my_atomic_fasptr((P), (D))
#define my_atomic_add32_explicit(P, A, O) my_atomic_add32((P), (A))
#define my_atomic_add64_explicit(P, A, O) my_atomic_add64((P), (A))
#define my_atomic_addptr_explicit(P, A, O) my_atomic_addptr((P), (A))
#define my_atomic_cas32_weak_explicit(P, E, D, S, F) \
my_atomic_cas32((P), (E), (D))
#define my_atomic_cas64_weak_explicit(P, E, D, S, F) \
my_atomic_cas64((P), (E), (D))
#define my_atomic_casptr_weak_explicit(P, E, D, S, F) \
my_atomic_casptr((P), (E), (D))
#define my_atomic_cas32_strong_explicit(P, E, D, S, F) \
my_atomic_cas32((P), (E), (D))
#define my_atomic_cas64_strong_explicit(P, E, D, S, F) \
my_atomic_cas64((P), (E), (D))
#define my_atomic_casptr_strong_explicit(P, E, D, S, F) \
my_atomic_casptr((P), (E), (D))
#endif
#endif /* MY_ATOMIC_INCLUDED */