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316a8cebf5
pmull_supported is not necessarily defined before crc32c_aarch64 Signed-off-by: Nia Alarie <nia@NetBSD.org>
340 lines
11 KiB
C
340 lines
11 KiB
C
#include <my_global.h>
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#include <string.h>
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#include <stdint.h>
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static int pmull_supported;
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#if defined(HAVE_ARMV8_CRC)
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#if defined(__APPLE__)
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#include <sys/sysctl.h>
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int crc32_aarch64_available(void)
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{
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int ret;
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size_t len = sizeof(ret);
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if (sysctlbyname("hw.optional.armv8_crc32", &ret, &len, NULL, 0) == -1)
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return 0;
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return ret;
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}
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const char *crc32c_aarch64_available(void)
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{
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if (crc32_aarch64_available() == 0)
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return NULL;
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pmull_supported = 1;
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return "Using ARMv8 crc32 + pmull instructions";
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}
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#else
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#include <sys/auxv.h>
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#if defined(__FreeBSD__)
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static unsigned long getauxval(unsigned int key)
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{
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unsigned long val;
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if (elf_aux_info(key, (void *)&val, (int)sizeof(val) != 0)
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return 0ul;
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return val;
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}
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#else
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# include <asm/hwcap.h>
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#endif
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#ifndef HWCAP_CRC32
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# define HWCAP_CRC32 (1 << 7)
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#endif
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#ifndef HWCAP_PMULL
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# define HWCAP_PMULL (1 << 4)
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#endif
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/* ARM made crc32 default from ARMv8.1 but optional in ARMv8A
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* Runtime check API.
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*/
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int crc32_aarch64_available(void)
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{
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unsigned long auxv= getauxval(AT_HWCAP);
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return (auxv & HWCAP_CRC32) != 0;
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}
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const char *crc32c_aarch64_available(void)
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{
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unsigned long auxv= getauxval(AT_HWCAP);
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if (!(auxv & HWCAP_CRC32))
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return NULL;
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pmull_supported= (auxv & HWCAP_PMULL) != 0;
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if (pmull_supported)
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return "Using ARMv8 crc32 + pmull instructions";
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else
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return "Using ARMv8 crc32 instructions";
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}
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#endif /* __APPLE__ */
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#endif /* HAVE_ARMV8_CRC */
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#ifndef HAVE_ARMV8_CRC_CRYPTO_INTRINSICS
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/* Request crc extension capabilities from the assembler */
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asm(".arch_extension crc");
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# ifdef HAVE_ARMV8_CRYPTO
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/* crypto extension */
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asm(".arch_extension crypto");
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# endif
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#define CRC32CX(crc, value) __asm__("crc32cx %w[c], %w[c], %x[v]":[c]"+r"(crc):[v]"r"(value))
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#define CRC32CW(crc, value) __asm__("crc32cw %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value))
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#define CRC32CH(crc, value) __asm__("crc32ch %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value))
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#define CRC32CB(crc, value) __asm__("crc32cb %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value))
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#define CRC32X(crc, value) __asm__("crc32x %w[c], %w[c], %x[v]":[c]"+r"(crc):[v]"r"(value))
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#define CRC32W(crc, value) __asm__("crc32w %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value))
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#define CRC32H(crc, value) __asm__("crc32h %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value))
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#define CRC32B(crc, value) __asm__("crc32b %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value))
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#define CRC32C3X8(buffer, ITR) \
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__asm__("crc32cx %w[c1], %w[c1], %x[v]":[c1]"+r"(crc1):[v]"r"(*((const uint64_t *)buffer + 42*1 + (ITR))));\
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__asm__("crc32cx %w[c2], %w[c2], %x[v]":[c2]"+r"(crc2):[v]"r"(*((const uint64_t *)buffer + 42*2 + (ITR))));\
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__asm__("crc32cx %w[c0], %w[c0], %x[v]":[c0]"+r"(crc0):[v]"r"(*((const uint64_t *)buffer + 42*0 + (ITR))));
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#else /* HAVE_ARMV8_CRC_CRYPTO_INTRINSICS */
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/* Intrinsics header*/
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#include <arm_acle.h>
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#include <arm_neon.h>
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#define CRC32CX(crc, value) (crc) = __crc32cd((crc), (value))
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#define CRC32CW(crc, value) (crc) = __crc32cw((crc), (value))
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#define CRC32CH(crc, value) (crc) = __crc32ch((crc), (value))
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#define CRC32CB(crc, value) (crc) = __crc32cb((crc), (value))
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#define CRC32X(crc, value) (crc) = __crc32d((crc), (value))
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#define CRC32W(crc, value) (crc) = __crc32w((crc), (value))
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#define CRC32H(crc, value) (crc) = __crc32h((crc), (value))
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#define CRC32B(crc, value) (crc) = __crc32b((crc), (value))
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#define CRC32C3X8(buffer, ITR) \
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crc1 = __crc32cd(crc1, *((const uint64_t *)buffer + 42*1 + (ITR)));\
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crc2 = __crc32cd(crc2, *((const uint64_t *)buffer + 42*2 + (ITR)));\
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crc0 = __crc32cd(crc0, *((const uint64_t *)buffer + 42*0 + (ITR)));
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#endif /* HAVE_ARMV8_CRC_CRYPTO_INTRINSICS */
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#define CRC32C7X3X8(buffer, ITR) do {\
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CRC32C3X8(buffer, ((ITR) * 7 + 0)) \
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CRC32C3X8(buffer, ((ITR) * 7 + 1)) \
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CRC32C3X8(buffer, ((ITR) * 7 + 2)) \
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CRC32C3X8(buffer, ((ITR) * 7 + 3)) \
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CRC32C3X8(buffer, ((ITR) * 7 + 4)) \
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CRC32C3X8(buffer, ((ITR) * 7 + 5)) \
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CRC32C3X8(buffer, ((ITR) * 7 + 6)) \
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} while(0)
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#define PREF4X64L1(buffer, PREF_OFFSET, ITR) \
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__asm__("PRFM PLDL1KEEP, [%x[v],%[c]]"::[v]"r"(buffer), [c]"I"((PREF_OFFSET) + ((ITR) + 0)*64));\
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__asm__("PRFM PLDL1KEEP, [%x[v],%[c]]"::[v]"r"(buffer), [c]"I"((PREF_OFFSET) + ((ITR) + 1)*64));\
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__asm__("PRFM PLDL1KEEP, [%x[v],%[c]]"::[v]"r"(buffer), [c]"I"((PREF_OFFSET) + ((ITR) + 2)*64));\
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__asm__("PRFM PLDL1KEEP, [%x[v],%[c]]"::[v]"r"(buffer), [c]"I"((PREF_OFFSET) + ((ITR) + 3)*64));
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#define PREF1KL1(buffer, PREF_OFFSET) \
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PREF4X64L1(buffer,(PREF_OFFSET), 0) \
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PREF4X64L1(buffer,(PREF_OFFSET), 4) \
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PREF4X64L1(buffer,(PREF_OFFSET), 8) \
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PREF4X64L1(buffer,(PREF_OFFSET), 12)
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#define PREF4X64L2(buffer, PREF_OFFSET, ITR) \
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__asm__("PRFM PLDL2KEEP, [%x[v],%[c]]"::[v]"r"(buffer), [c]"I"((PREF_OFFSET) + ((ITR) + 0)*64));\
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__asm__("PRFM PLDL2KEEP, [%x[v],%[c]]"::[v]"r"(buffer), [c]"I"((PREF_OFFSET) + ((ITR) + 1)*64));\
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__asm__("PRFM PLDL2KEEP, [%x[v],%[c]]"::[v]"r"(buffer), [c]"I"((PREF_OFFSET) + ((ITR) + 2)*64));\
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__asm__("PRFM PLDL2KEEP, [%x[v],%[c]]"::[v]"r"(buffer), [c]"I"((PREF_OFFSET) + ((ITR) + 3)*64));
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#define PREF1KL2(buffer, PREF_OFFSET) \
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PREF4X64L2(buffer,(PREF_OFFSET), 0) \
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PREF4X64L2(buffer,(PREF_OFFSET), 4) \
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PREF4X64L2(buffer,(PREF_OFFSET), 8) \
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PREF4X64L2(buffer,(PREF_OFFSET), 12)
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uint32_t crc32c_aarch64(uint32_t crc, const unsigned char *buffer, uint64_t len)
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{
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uint32_t crc0, crc1, crc2;
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int64_t length= (int64_t)len;
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crc^= 0xffffffff;
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/* Pmull runtime check here.
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* Raspberry Pi 4 supports crc32 but doesn't support pmull (MDEV-23030).
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*
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* Consider the condition that the target platform does support hardware crc32
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* but not support PMULL. In this condition, it should leverage the aarch64
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* crc32 instruction (__crc32c) and just only skip parallel computation (pmull/vmull)
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* rather than skip all hardware crc32 instruction of computation.
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*/
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if (pmull_supported)
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{
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/* The following Macro (HAVE_ARMV8_CRYPTO) is used for compiling check */
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#ifdef HAVE_ARMV8_CRYPTO
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/* Crypto extension Support
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* Parallel computation with 1024 Bytes (per block)
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* Intrinsics Support
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*/
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# ifdef HAVE_ARMV8_CRC_CRYPTO_INTRINSICS
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const poly64_t k1= 0xe417f38a, k2= 0x8f158014;
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uint64_t t0, t1;
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/* Process per block size of 1024 Bytes
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* A block size = 8 + 42*3*sizeof(uint64_t) + 8
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*/
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while ((length-= 1024) >= 0)
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{
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/* Prefetch 3*1024 data for avoiding L2 cache miss */
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PREF1KL2(buffer, 1024*3);
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/* Do first 8 bytes here for better pipelining */
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crc0= __crc32cd(crc, *(const uint64_t *)buffer);
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crc1= 0;
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crc2= 0;
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buffer+= sizeof(uint64_t);
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/* Process block inline
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* Process crc0 last to avoid dependency with above
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*/
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CRC32C7X3X8(buffer, 0);
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CRC32C7X3X8(buffer, 1);
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CRC32C7X3X8(buffer, 2);
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CRC32C7X3X8(buffer, 3);
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CRC32C7X3X8(buffer, 4);
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CRC32C7X3X8(buffer, 5);
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buffer+= 42*3*sizeof(uint64_t);
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/* Prefetch data for following block to avoid L1 cache miss */
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PREF1KL1(buffer, 1024);
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/* Last 8 bytes
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* Merge crc0 and crc1 into crc2
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* crc1 multiply by K2
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* crc0 multiply by K1
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*/
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t1= (uint64_t)vmull_p64(crc1, k2);
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t0= (uint64_t)vmull_p64(crc0, k1);
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crc= __crc32cd(crc2, *(const uint64_t *)buffer);
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crc1= __crc32cd(0, t1);
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crc^= crc1;
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crc0= __crc32cd(0, t0);
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crc^= crc0;
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buffer+= sizeof(uint64_t);
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}
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# else /* HAVE_ARMV8_CRC_CRYPTO_INTRINSICS */
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/*No intrinsics*/
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__asm__("mov x16, #0xf38a \n\t"
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"movk x16, #0xe417, lsl 16 \n\t"
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"mov v1.2d[0], x16 \n\t"
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"mov x16, #0x8014 \n\t"
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"movk x16, #0x8f15, lsl 16 \n\t"
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"mov v0.2d[0], x16 \n\t"
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:::"x16");
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while ((length-= 1024) >= 0)
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{
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PREF1KL2(buffer, 1024*3);
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__asm__("crc32cx %w[c0], %w[c], %x[v]\n\t"
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:[c0]"=r"(crc0):[c]"r"(crc), [v]"r"(*(const uint64_t *)buffer):);
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crc1= 0;
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crc2= 0;
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buffer+= sizeof(uint64_t);
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CRC32C7X3X8(buffer, 0);
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CRC32C7X3X8(buffer, 1);
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CRC32C7X3X8(buffer, 2);
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CRC32C7X3X8(buffer, 3);
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CRC32C7X3X8(buffer, 4);
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CRC32C7X3X8(buffer, 5);
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buffer+= 42*3*sizeof(uint64_t);
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PREF1KL1(buffer, 1024);
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__asm__("mov v2.2d[0], %x[c1] \n\t"
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"pmull v2.1q, v2.1d, v0.1d \n\t"
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"mov v3.2d[0], %x[c0] \n\t"
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"pmull v3.1q, v3.1d, v1.1d \n\t"
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"crc32cx %w[c], %w[c2], %x[v] \n\t"
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"mov %x[c1], v2.2d[0] \n\t"
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"crc32cx %w[c1], wzr, %x[c1] \n\t"
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"eor %w[c], %w[c], %w[c1] \n\t"
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"mov %x[c0], v3.2d[0] \n\t"
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"crc32cx %w[c0], wzr, %x[c0] \n\t"
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"eor %w[c], %w[c], %w[c0] \n\t"
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:[c1]"+r"(crc1), [c0]"+r"(crc0), [c2]"+r"(crc2), [c]"+r"(crc)
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:[v]"r"(*((const uint64_t *)buffer)));
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buffer+= sizeof(uint64_t);
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}
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# endif /* HAVE_ARMV8_CRC_CRYPTO_INTRINSICS */
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/* Done if Input data size is aligned with 1024 */
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if (!(length+= 1024))
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return ~crc;
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#endif /* HAVE_ARMV8_CRYPTO */
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} // end if pmull_supported
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while ((length-= sizeof(uint64_t)) >= 0)
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{
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CRC32CX(crc, *(uint64_t *)buffer);
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buffer+= sizeof(uint64_t);
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}
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/* The following is more efficient than the straight loop */
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if (length & sizeof(uint32_t))
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{
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CRC32CW(crc, *(uint32_t *)buffer);
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buffer+= sizeof(uint32_t);
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}
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if (length & sizeof(uint16_t))
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{
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CRC32CH(crc, *(uint16_t *)buffer);
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buffer+= sizeof(uint16_t);
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}
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if (length & sizeof(uint8_t))
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CRC32CB(crc, *buffer);
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return ~crc;
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}
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/* There are multiple approaches to calculate crc.
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Approach-1: Process 8 bytes then 4 bytes then 2 bytes and then 1 bytes
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Approach-2: Process 8 bytes and remaining workload using 1 bytes
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Apporach-3: Process 64 bytes at once by issuing 8 crc call and remaining
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using 8/1 combination.
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Based on micro-benchmark testing we found that Approach-2 works best especially
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given small chunk of variable data. */
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unsigned int crc32_aarch64(unsigned int crc, const void *buf, size_t len)
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{
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const uint8_t *buf1= buf;
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const uint64_t *buf8= (const uint64_t *) (((uintptr_t) buf + 7) & ~7);
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crc= ~crc;
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/* if start pointer is not 8 bytes aligned */
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while ((buf1 != (const uint8_t *) buf8) && len)
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{
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CRC32B(crc, *buf1++);
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len--;
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}
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for (; len >= 8; len-= 8)
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CRC32X(crc, *buf8++);
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buf1= (const uint8_t *) buf8;
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while (len--)
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CRC32B(crc, *buf1++);
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return ~crc;
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}
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