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131 lines
3.6 KiB
C++
131 lines
3.6 KiB
C++
/* -*- mode: C++; c-basic-offset: 4; indent-tabs-mode: nil -*- */
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// vim: ft=cpp:expandtab:ts=8:sw=4:softtabstop=4:
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#ident "$Id$"
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#ident "Copyright (c) 2007-2012 Tokutek Inc. All rights reserved."
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#ident "The technology is licensed by the Massachusetts Institute of Technology, Rutgers State University of New Jersey, and the Research Foundation of State University of New York at Stony Brook under United States of America Serial No. 11/760379 and to the patents and/or patent applications resulting from it."
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/* Time {m,l,s}fence vs.xchgl for a memory barrier. */
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/* Timing numbers:
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* Intel T2500 2GHZ
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do1 9.0ns/loop
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mfence: 29.0ns/loop (marginal cost= 20.0ns)
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sfence: 17.3ns/loop (marginal cost= 8.3ns)
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lfence: 23.6ns/loop (marginal cost= 14.6ns)
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xchgl: 35.8ns/loop (marginal cost= 26.8ns)
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* AMD Athlon 64 X2 Dual Core Processor 4200+
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Timings are more crazy
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do1 20.6ns/loop
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mfence: 12.9ns/loop (marginal cost= -7.6ns)
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sfence: 8.4ns/loop (marginal cost= -12.1ns)
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lfence: 20.2ns/loop (marginal cost= -0.3ns)
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xchgl: 16.6ns/loop (marginal cost= -3.9ns)
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do1 13.0ns/loop
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mfence: 25.6ns/loop (marginal cost= 12.6ns)
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sfence: 21.0ns/loop (marginal cost= 8.1ns)
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lfence: 12.9ns/loop (marginal cost= -0.1ns)
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xchgl: 29.3ns/loop (marginal cost= 16.3ns)
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*/
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#include <sys/time.h>
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#include <stdio.h>
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enum { COUNT = 100000000 };
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static inline void xchgl (void) {
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{
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/*
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* According to the Intel Architecture Software Developer's
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* Manual, Volume 3: System Programming Guide
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* (http://www.intel.com/design/pro/manuals/243192.htm), page
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* 7-6, "For the P6 family processors, locked operations
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* serialize all outstanding load and store operations (that
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* is, wait for them to complete)."
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* Since xchg is locked by default, it is one way to do membar.
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*/
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int x=0, y;
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asm volatile ("xchgl %0,%1" :"=r" (x) :"m" (y), "0" (x) :"memory");
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}
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}
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static inline void mfence (void) {
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asm volatile ("mfence":::"memory");
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}
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static inline void lfence (void) {
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asm volatile ("lfence":::"memory");
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}
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static inline void sfence (void) {
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asm volatile ("sfence":::"memory");
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}
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int lock_for_lock_and_unlock;
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static inline void lock_and_unlock (void) {
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(void)__sync_lock_test_and_set(&lock_for_lock_and_unlock, 1);
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__sync_lock_release(&lock_for_lock_and_unlock);
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}
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double tdiff (struct timeval *start, struct timeval *end) {
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return ((end->tv_sec-start->tv_sec + 1e-6*(end->tv_usec + start->tv_usec))/COUNT)*1e9;
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}
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double nop_cost;
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void do1 (volatile int *x) {
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int i;
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struct timeval start, end;
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gettimeofday(&start, 0);
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for (i=0; i<COUNT; i++) {
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x[0]++;
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x[1]++;
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x[2]++;
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x[3]++;
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}
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gettimeofday(&end, 0);
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printf("do1 %6.1fns/loop\n", nop_cost=tdiff(&start, &end));
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}
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#define doit(name) void do ##name (volatile int *x) { \
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int i; \
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struct timeval start, end; \
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gettimeofday(&start, 0); \
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for (i=0; i<COUNT; i++) { \
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x[0]++; \
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x[1]++; \
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name(); \
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x[2]++; \
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x[3]++; \
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} \
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gettimeofday(&end, 0); \
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double this_cost = tdiff(&start, &end); \
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printf("%15s:%6.1fns/loop (marginal cost=%6.1fns)\n", #name, this_cost, this_cost-nop_cost); \
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}
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doit(mfence)
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doit(lfence)
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doit(sfence)
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doit(xchgl)
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doit(lock_and_unlock);
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int main (int argc __attribute__((__unused__)),
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char *argv[] __attribute__((__unused__))) {
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int x[4];
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int i;
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for (i=0; i<4; i++) {
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do1(x);
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domfence(x);
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dosfence(x);
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dolfence(x);
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doxchgl(x);
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dolock_and_unlock(x);
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}
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return 0;
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}
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