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d5a417b9d5
MY_RELAX_CPU(): On GCC and compatible compilers (including clang and its derivatives), let us use a null inline assembler block as the fallback. This should benefit s390x and LoongArch, for example. Also, let us remove the generic fallback block that does exactly the opposite of what this function aims to achieve: avoid hogging the memory bus so that other threads will have a chance to let our spin loop to proceed. On RISC-V, we will use __builtin_riscv_pause() which is a valid instruction encoding in all ISA versions according to https://gcc.gnu.org/pipermail/gcc-patches/2021-January/562936.html
159 lines
4.5 KiB
C
159 lines
4.5 KiB
C
#ifndef MY_CPU_INCLUDED
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#define MY_CPU_INCLUDED
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/* Copyright (c) 2013, 2020, MariaDB
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; version 2 of the License.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1335 USA
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*/
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/* instructions for specific cpu's */
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/*
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Macros for adjusting thread priority (hardware multi-threading)
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The defines are the same ones used by the linux kernel
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*/
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#ifdef _ARCH_PWR8
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#ifdef __GLIBC__
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#include <sys/platform/ppc.h>
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/* Very low priority */
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#define HMT_very_low() __ppc_set_ppr_very_low()
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/* Low priority */
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#define HMT_low() __ppc_set_ppr_low()
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/* Medium low priority */
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#define HMT_medium_low() __ppc_set_ppr_med_low()
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/* Medium priority */
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#define HMT_medium() __ppc_set_ppr_med()
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/* Medium high priority */
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#define HMT_medium_high() __ppc_set_ppr_med_high()
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/* High priority */
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#define HMT_high() asm volatile("or 3,3,3")
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#else /* GLIBC */
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#if defined(__FreeBSD__)
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#include <sys/types.h>
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#include <sys/sysctl.h>
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#endif
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#define HMT_very_low() __asm__ volatile ("or 31,31,31")
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#define HMT_low() __asm__ volatile ("or 1,1,1")
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#define HMT_medium_low() __asm__ volatile ("or 6,6,6")
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#define HMT_medium() __asm__ volatile ("or 2,2,2")
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#define HMT_medium_high() __asm__ volatile ("or 5,5,5")
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#define HMT_high() asm volatile("or 3,3,3")
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#endif /* GLIBC */
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#else
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#define HMT_very_low()
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#define HMT_low()
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#define HMT_medium_low()
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#define HMT_medium()
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#define HMT_medium_high()
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#define HMT_high()
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#endif
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#if defined __i386__ || defined __x86_64__ || defined _WIN32
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# define HAVE_PAUSE_INSTRUCTION /* added in Intel Pentium 4 */
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#endif
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#ifdef _WIN32
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#elif defined HAVE_PAUSE_INSTRUCTION
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#elif defined(_ARCH_PWR8)
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#elif defined __GNUC__ && (defined __arm__ || defined __aarch64__)
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#else
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# include "my_global.h"
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# include "my_atomic.h"
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#endif
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static inline void MY_RELAX_CPU(void)
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{
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#ifdef _WIN32
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/*
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In the Win32 API, the x86 PAUSE instruction is executed by calling
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the YieldProcessor macro defined in WinNT.h. It is a CPU architecture-
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independent way by using YieldProcessor.
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*/
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YieldProcessor();
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#elif defined HAVE_PAUSE_INSTRUCTION
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/*
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According to the gcc info page, asm volatile means that the
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instruction has important side-effects and must not be removed.
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Also asm volatile may trigger a memory barrier (spilling all registers
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to memory).
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*/
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#ifdef __SUNPRO_CC
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asm ("pause" );
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#else
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__asm__ __volatile__ ("pause");
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#endif
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#elif defined(_ARCH_PWR8)
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#ifdef __FreeBSD__
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uint64_t __tb;
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__asm__ volatile ("mfspr %0, 268" : "=r" (__tb));
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#else
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/* Changed from __ppc_get_timebase for musl compatibility */
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__builtin_ppc_get_timebase();
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#endif
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#elif defined __GNUC__ && defined __riscv
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__builtin_riscv_pause();
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#elif defined __GNUC__
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/* Mainly, prevent the compiler from optimizing away delay loops */
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__asm__ __volatile__ ("":::"memory");
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#endif
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}
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#ifdef HAVE_PAUSE_INSTRUCTION
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# ifdef __cplusplus
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extern "C" {
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# endif
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extern unsigned my_cpu_relax_multiplier;
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void my_cpu_init(void);
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# ifdef __cplusplus
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}
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# endif
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#else
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# define my_cpu_relax_multiplier 200
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# define my_cpu_init() /* nothing */
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#endif
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/*
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LF_BACKOFF should be used to improve performance on hyperthreaded CPUs. Intel
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recommends to use it in spin loops also on non-HT machines to reduce power
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consumption (see e.g http://softwarecommunity.intel.com/articles/eng/2004.htm)
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Running benchmarks for spinlocks implemented with InterlockedCompareExchange
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and YieldProcessor shows that much better performance is achieved by calling
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YieldProcessor in a loop - that is, yielding longer. On Intel boxes setting
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loop count in the range 200-300 brought best results.
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*/
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static inline int LF_BACKOFF(void)
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{
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unsigned i= my_cpu_relax_multiplier;
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while (i--)
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MY_RELAX_CPU();
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return 1;
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}
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/**
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Run a delay loop while waiting for a shared resource to be released.
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@param delay originally, roughly microseconds on 100 MHz Intel Pentium
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*/
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static inline void ut_delay(unsigned delay)
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{
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unsigned i= my_cpu_relax_multiplier / 4 * delay;
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HMT_low();
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while (i--)
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MY_RELAX_CPU();
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HMT_medium();
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}
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#endif
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