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4 commits

Author SHA1 Message Date
Marko Mäkelä
f740d23ce6 Merge 10.1 into 10.2 2017-04-28 12:22:32 +03:00
Daniel Black
5136295b21 OSX: get cache line size 2017-04-20 13:44:58 +04:00
Alexey Kopytov
49ad084503 Few improvements related to CPU cache line size and padding: 
Bug #79636: CACHE_LINE_SIZE should be 128 on AArch64
Bug #79637: Hard-coded cache line size
Bug #79638: Reconcile CACHE_LINE_SIZE with CPU_LEVEL1_DCACHE_LINESIZE
Bug #79652: Suspicious padding in srv_conc_t

- changed CPU_LEVEL1_DCACHE_LINESIZE to default to 128 bytes on POWER
  and AArch64 architectures in cases when no value could be detected
  by CMake using getconf

- changed CACHE_LINE_SIZE definition in ut0counter.h to be an alias of
  CPU_LEVEL1_DCACHE_LINESIZE

- changed a number of hard-coded 64-byte cache line size values in the
  InnoDB code

- fixed insufficient padding for srv_conc members in srv0conc.cc

Ported to Mariadb by Daniel Black <daniel.black@au.ibm.com>
Added s390 cache size of 256 at same time.
 2016-06-07 13:02:31 +04:00
Michael Widenius
068c61978e Temporary commit of 10.0-merge 2013-03-26 00:03:13 +02:00