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Use native format in interpreter -
(old code mixed the 3 alternatives: native, [lo, hi], [hi, lo]) This fixes problem with auto increment on different byte order (This also make adding of signed ints really simple...)
This commit is contained in:
joreland@mysql.com
parent
a2255169d7
commit
1e2f7cfccf
3 changed files with 54 additions and 98 deletions
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@ -1505,6 +1505,8 @@ int Dbtup::interpreterNextLab(Signal* signal,
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// the register to indicate a NULL value.
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/* ------------------------------------------------------------- */
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TregMemBuffer[theRegister] = 0;
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TregMemBuffer[theRegister + 1] = 0;
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TregMemBuffer[theRegister + 2] = 0;
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} else if (TnoDataRW == (Uint32)-1) {
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jam();
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tupkeyErrorLab(signal);
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@ -1593,23 +1595,22 @@ int Dbtup::interpreterNextLab(Signal* signal,
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case Interpreter::LOAD_CONST16:
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jam();
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TregMemBuffer[theRegister] = 0x50; /* 32 BIT UNSIGNED CONSTANT */
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TregMemBuffer[theRegister + 1] = theInstruction >> 16;
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TregMemBuffer[theRegister + 2] = 0;
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* (Int64*)(TregMemBuffer+theRegister+1) = theInstruction >> 16;
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break;
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case Interpreter::LOAD_CONST32:
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jam();
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TregMemBuffer[theRegister] = 0x50; /* 32 BIT UNSIGNED CONSTANT */
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TregMemBuffer[theRegister + 1] = TcurrentProgram[TprogramCounter];
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TregMemBuffer[theRegister + 2] = 0;
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* (Int64*)(TregMemBuffer+theRegister+1) = *
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(TcurrentProgram+TprogramCounter);
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TprogramCounter++;
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break;
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case Interpreter::LOAD_CONST64:
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jam();
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TregMemBuffer[theRegister] = 0x60; /* 64 BIT UNSIGNED CONSTANT */
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TregMemBuffer[theRegister + 1] = TcurrentProgram[TprogramCounter + 0];
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TregMemBuffer[theRegister + 2] = TcurrentProgram[TprogramCounter + 1];
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* (Int64*)(TregMemBuffer+theRegister+1) = * (Int64*)
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(TcurrentProgram+TprogramCounter);
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TprogramCounter += 2;
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break;
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@ -1620,27 +1621,16 @@ int Dbtup::interpreterNextLab(Signal* signal,
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Uint32 TdestRegister = Interpreter::getReg3(theInstruction) << 2;
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Uint32 TrightType = TregMemBuffer[TrightRegister];
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Uint32 Tright0 = TregMemBuffer[TrightRegister + 1];
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Uint32 Tright1 = TregMemBuffer[TrightRegister + 2];
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Int64 Tright0 = * (Int64*)(TregMemBuffer + TrightRegister + 1);
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Uint32 TleftType = TregMemBuffer[theRegister];
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Uint32 Tleft0 = TregMemBuffer[theRegister + 1];
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Uint32 Tleft1 = TregMemBuffer[theRegister + 2];
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Uint32 Tany64bit = (((TleftType | TrightType) & 0x60) == 0x60);
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Int64 Tleft0 = * (Int64*)(TregMemBuffer + theRegister + 1);
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if ((TleftType | TrightType) != 0) {
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Uint32 Tdest0 = Tleft0 + Tright0;
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Uint32 Tdest1 = 0;
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TregMemBuffer[TdestRegister + 1] = Tdest0;
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TregMemBuffer[TdestRegister] = 0x50;
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if (Tany64bit) {
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TregMemBuffer[TdestRegister] = 0x60;
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Tdest1 = Tleft1 + Tright1;
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if (Tdest0 < Tleft0) {
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Tdest1++;
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}
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}//if
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TregMemBuffer[TdestRegister + 2] = Tdest1;
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Uint64 Tdest0 = Tleft0 + Tright0;
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* (Int64*)(TregMemBuffer+TdestRegister+1) = Tdest0;
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TregMemBuffer[TdestRegister] = 0x60;
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} else {
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return TUPKEY_abort(signal, 20);
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}
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@ -1654,30 +1644,18 @@ int Dbtup::interpreterNextLab(Signal* signal,
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Uint32 TdestRegister = Interpreter::getReg3(theInstruction) << 2;
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Uint32 TrightType = TregMemBuffer[TrightRegister];
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Uint32 Tright0 = TregMemBuffer[TrightRegister + 1];
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Uint32 Tright1 = TregMemBuffer[TrightRegister + 2];
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Int64 Tright0 = * (Int64*)(TregMemBuffer + TrightRegister + 1);
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Uint32 TleftType = TregMemBuffer[theRegister];
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Uint32 Tleft0 = TregMemBuffer[theRegister + 1];
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Uint32 Tleft1 = TregMemBuffer[theRegister + 2];
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Uint32 Tany64bit = (((TleftType | TrightType) & 0x60) == 0x60);
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Int64 Tleft0 = * (Int64*)(TregMemBuffer + theRegister + 1);
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if ((TleftType | TrightType) != 0) {
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Uint32 Tdest0 = Tleft0 - Tright0;
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Uint32 Tdest1 = 0;
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TregMemBuffer[TdestRegister + 1] = Tdest0;
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TregMemBuffer[TdestRegister] = 0x50;
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if (Tany64bit) {
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TregMemBuffer[TdestRegister] = 0x60;
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Tdest1 = Tleft1 - Tright1;
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if (Tdest0 > Tleft0) {
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Tdest1--;
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}//if
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}//if
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TregMemBuffer[TdestRegister + 2] = Tdest1;
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Int64 Tdest0 = Tleft0 - Tright0;
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* (Int64*)(TregMemBuffer+TdestRegister+1) = Tdest0;
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TregMemBuffer[TdestRegister] = 0x60;
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} else {
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return TUPKEY_abort(signal, 21);
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}//if
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return TUPKEY_abort(signal, 20);
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}
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break;
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}
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@ -1754,17 +1732,16 @@ int Dbtup::interpreterNextLab(Signal* signal,
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{
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Uint32 TrightRegister = Interpreter::getReg2(theInstruction) << 2;
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Uint32 TleftType = TregMemBuffer[theRegister];
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Uint32 Tleft0 = TregMemBuffer[theRegister + 1];
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Uint32 Tleft1 = TregMemBuffer[theRegister + 2];
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Uint32 TrightType = TregMemBuffer[TrightRegister];
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Uint32 Tright0 = TregMemBuffer[TrightRegister + 1];
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Uint32 Tright1 = TregMemBuffer[TrightRegister + 2];
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Int64 Tright0 = * (Int64*)(TregMemBuffer + TrightRegister + 1);
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Uint32 TleftType = TregMemBuffer[theRegister];
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Int64 Tleft0 = * (Int64*)(TregMemBuffer + theRegister + 1);
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if ((TrightType | TleftType) != 0) {
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jam();
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if ((Tleft0 < Tright0) || ((Tleft0 == Tright0) &&
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(Tleft1 < Tright1))) {
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if (Tleft0 < Tright0) {
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TprogramCounter = brancher(theInstruction, TprogramCounter);
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}//if
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} else {
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@ -1777,17 +1754,16 @@ int Dbtup::interpreterNextLab(Signal* signal,
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{
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Uint32 TrightRegister = Interpreter::getReg2(theInstruction) << 2;
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Uint32 TleftType = TregMemBuffer[theRegister];
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Uint32 Tleft0 = TregMemBuffer[theRegister + 1];
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Uint32 Tleft1 = TregMemBuffer[theRegister + 2];
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Uint32 TrightType = TregMemBuffer[TrightRegister];
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Uint32 Tright0 = TregMemBuffer[TrightRegister + 1];
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Uint32 Tright1 = TregMemBuffer[TrightRegister + 2];
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Int64 Tright0 = * (Int64*)(TregMemBuffer + TrightRegister + 1);
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Uint32 TleftType = TregMemBuffer[theRegister];
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Int64 Tleft0 = * (Int64*)(TregMemBuffer + theRegister + 1);
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if ((TrightType | TleftType) != 0) {
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jam();
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if ((Tleft0 < Tright0) || ((Tleft0 == Tright0) &&
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(Tleft1 <= Tright1))) {
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if (Tleft0 <= Tright0) {
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TprogramCounter = brancher(theInstruction, TprogramCounter);
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}//if
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} else {
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@ -1800,17 +1776,16 @@ int Dbtup::interpreterNextLab(Signal* signal,
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{
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Uint32 TrightRegister = Interpreter::getReg2(theInstruction) << 2;
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Uint32 TleftType = TregMemBuffer[theRegister];
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Uint32 Tleft0 = TregMemBuffer[theRegister + 1];
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Uint32 Tleft1 = TregMemBuffer[theRegister + 2];
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Uint32 TrightType = TregMemBuffer[TrightRegister];
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Uint32 Tright0 = TregMemBuffer[TrightRegister + 1];
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Uint32 Tright1 = TregMemBuffer[TrightRegister + 2];
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Int64 Tright0 = * (Int64*)(TregMemBuffer + TrightRegister + 1);
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Uint32 TleftType = TregMemBuffer[theRegister];
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Int64 Tleft0 = * (Int64*)(TregMemBuffer + theRegister + 1);
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if ((TrightType | TleftType) != 0) {
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jam();
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if ((Tleft0 > Tright0) || ((Tleft0 == Tright0) &&
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(Tleft1 > Tright1))) {
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if (Tleft0 > Tright0){
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TprogramCounter = brancher(theInstruction, TprogramCounter);
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}//if
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} else {
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@ -1823,17 +1798,16 @@ int Dbtup::interpreterNextLab(Signal* signal,
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{
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Uint32 TrightRegister = Interpreter::getReg2(theInstruction) << 2;
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Uint32 TleftType = TregMemBuffer[theRegister];
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Uint32 Tleft0 = TregMemBuffer[theRegister + 1];
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Uint32 Tleft1 = TregMemBuffer[theRegister + 2];
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Uint32 TrightType = TregMemBuffer[TrightRegister];
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Uint32 Tright0 = TregMemBuffer[TrightRegister + 1];
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Uint32 Tright1 = TregMemBuffer[TrightRegister + 2];
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Int64 Tright0 = * (Int64*)(TregMemBuffer + TrightRegister + 1);
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Uint32 TleftType = TregMemBuffer[theRegister];
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Int64 Tleft0 = * (Int64*)(TregMemBuffer + theRegister + 1);
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if ((TrightType | TleftType) != 0) {
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jam();
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if ((Tleft0 > Tright0) || ((Tleft0 == Tright0) &&
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(Tleft1 >= Tright1))) {
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if (Tleft0 >= Tright0){
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TprogramCounter = brancher(theInstruction, TprogramCounter);
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}//if
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} else {
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@ -859,15 +859,7 @@ Ndb::opTupleIdOnNdb(Uint32 aTableId, Uint64 opValue, Uint32 op)
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case 0:
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tOperation->interpretedUpdateTuple();
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tOperation->equal("SYSKEY_0", aTableId );
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{
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#ifdef WORDS_BIGENDIAN
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Uint64 cacheSize64 = opValue; // XXX interpreter bug on Uint32
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tOperation->incValue("NEXTID", cacheSize64);
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#else
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Uint32 cacheSize32 = opValue; // XXX for little-endian
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tOperation->incValue("NEXTID", cacheSize32);
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#endif
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}
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tOperation->incValue("NEXTID", opValue);
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tRecAttrResult = tOperation->getValue("NEXTID");
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if (tConnection->execute( Commit ) == -1 )
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@ -408,9 +408,7 @@ NdbOperation::incValue(const NdbColumnImpl* tNdbColumnImpl, Uint64 aValue)
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// Load aValue into register 7
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if (insertATTRINFO( Interpreter::LoadConst64(7)) == -1)
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goto incValue_error1;
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if (insertATTRINFO((Uint32)(aValue >> 32)) == -1)
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goto incValue_error1;
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if (insertATTRINFO(Uint32(aValue & 0xFFFFFFFF)) == -1)
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if (insertATTRINFOloop((Uint32*)&aValue, 2) == -1)
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goto incValue_error1;
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// Add register 6 and 7 and put result in register 7
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if (insertATTRINFO( Interpreter::Add(7, 6, 7)) == -1)
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@ -451,9 +449,7 @@ NdbOperation::subValue(const NdbColumnImpl* tNdbColumnImpl, Uint64 aValue)
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// Load aValue into register 7
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if (insertATTRINFO( Interpreter::LoadConst64(7)) == -1)
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goto subValue_error1;
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if (insertATTRINFO((Uint32)(aValue >> 32)) == -1)
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goto subValue_error1;
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if (insertATTRINFO(Uint32(aValue & 0xFFFFFFFF)) == -1)
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if (insertATTRINFOloop((Uint32*)&aValue, 2) == -1)
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goto subValue_error1;
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// Subtract register 6 and 7 and put result in register 7
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if (insertATTRINFO( Interpreter::Sub(7, 6, 7)) == -1)
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@ -690,8 +686,6 @@ int
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NdbOperation::load_const_u64(Uint32 RegDest, Uint64 Constant)
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{
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INT_DEBUG(("load_const_u64 %u %llu", RegDest, Constant));
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Uint32 tTemp1;
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Uint32 tTemp2;
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if (initial_interpreterCheck() == -1)
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return -1;
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if (RegDest >= 8)
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@ -699,15 +693,11 @@ NdbOperation::load_const_u64(Uint32 RegDest, Uint64 Constant)
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setErrorCodeAbort(4229);
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return -1;
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}
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tTemp1 = (Uint32)(Constant >> 32);
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tTemp2 = (Uint32)(Constant & 0xFFFFFFFF);
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// 64 bit value
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if (insertATTRINFO( Interpreter::LoadConst64(RegDest)) == -1)
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return -1;
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if (insertATTRINFO(tTemp1) == -1)
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return -1;
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if (insertATTRINFO(tTemp2) == -1)
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if (insertATTRINFOloop((Uint32*)&Constant, 2) == -1)
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return -1;
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theErrorLine++;
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return 0;
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